Digital Pots Achieve Voltage-to-Resistance Conversion

Voltage-to-resistance converters, sometimes needed in industrial controls and variable-bias circuits, can be difficult to implement. The simple approach of Figure 1 builds such a converter using two digital potentiometers.

Digital potentiometer U1 and comparator U3 form a digital track-and-hold circuit in which U1 adjusts its internal voltage divider to make V_WIPER track V_IN. Wiper resistance is therefore proportional to V_IN. Because the digital inputs of U1 and U2 are connected together, U2's wiper position is the same as that of U1, and resistances between corresponding terminals are the same. Thus, the output resistance is proportional to V_IN, as required for voltage-to-resistance conversion.

Operation of the digital track-and-hold is as follows. To track V_IN, the wiper (center tap) of digital potentiometer U1 moves up or down as each clock pulse arrives. Comparator U3 compares the analog input (V_IN) with the wiper voltage (V_WIPER). If V_IN > V_WIPER, the comparator asserts logic high, causing the wiper position to move up and increase the value of V_WIPER. V_WIPER keeps increasing until it's greater than V_IN, then the comparator toggles and drives the wiper position downward. On each clock cycle, the wiper moves up or down as required to track V_IN. Reference inputs for the voltage divider (VH and VL) set the input voltage range: if the V_IN range is 0V to 5VDC, set VL = GND and VH = 5VDC.

Because U1 and U2 are identical and their digital inputs are connected together, their wiper positions are the same. Applying a logic low to the LOCK input allows the output resistance to change with V_IN, and applying a logic high holds the resistance value indefinitely.

LOCK may be connected permanently to ground, but in that case the output resistance toggles continually between two consecutive states, even if V_IN is constant. For example, if the potentiometer is 10kΩ and you set the wiper to 5kΩ, the output resistance will toggle between 5kΩ and 5.3125kΩ on every clock cycle. If necessary, you can filter that effect by connecting a capacitor to the output wiper. A clock frequency between 100Hz and 10kHz is acceptable.

Output resistance does not change instantly with V_IN, but takes a number of clock cycles to reach its final value. The number of cycles (maximum 32) depends on the initial wiper position and the input voltage.

If higher resolution is needed, substitute a 6- or 8-bit digital potentiometer for the 5-bit model shown. Note that the MAX5160 has a power-up reset that sets the wiper position to mid-scale, thereby allowing the two digital pots to synchronize to the same resistance. Choose a digital pot that has a known state at power up.

This design idea appeared in the June 7, 2004 issue of Electronic Design magazine.