AN-1604: Thermal Management Calculations for RF Amplifiers in LFCSP and Flange Packages

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Introduction

Radio frequency (RF) amplifiers are available in lead frame chip scale packages (LFCSPs) and flange packages attached to printed circuit boards (PCBs) using mature reflow soldering processes. The PCB must function not only as the electrical interconnect between devices, but as the primary path to conduct heat away from the amplifier using the metal slug on the underside of the package.

This application note describes the concepts of thermal impedance and provides a technique for modeling the heat flow from the die to the heat sink of a typical RF amplifier in a LFCSP or flange package.

Review Of Thermal Concepts

Heat Flow


When a temperature difference exists across a material, heat flows from high temperature areas to low temperature areas. This process is similar to an electric current flowing through a circuit from a higher potential to a lower potential.


Thermal Resistance


All materials conduct heat to some degree. Thermal conductivity is the standard measure of the ability of materials to conduct heat. Values of thermal conductivity are typically specified in units of watts per meter kelvin (W/mK) or watts per inch kelvin (W/inK). After the thermal conductivity of a material is known, the thermal resistance (θ) of the volume of that material is calculated with a unit of °C/W or K/W as follows:

equation1

where:

  • Length is the length or thickness of the material in meters.
  • k is the thermal conductivity of the material.
  • Area is the cross sectional area in m2.

Temperature


Using the analogy that heat flow is equivalent to electrical current flow, the temperature difference across a material with thermal resistance and a heat current flowing through it is as follows:

equation2

where:

  • ΔT is the temperature difference across the material (K or °C).
  • Q is the heat current (W).
  • θ is the thermal resistance of the material (°C/W or K/W).

Device Thermal Resistance

The thermal resistance of the device is complex and often nonlinear with temperature. Therefore, the thermal model of the device is developed using finite element analysis. Infrared photography determines the temperature of the device junctions and the temperature of the package during operation. Based on these analyses and measurements, an equivalent thermal resistance is determined. The equivalent thermal resistance is valid under the specific conditions at which the device is measured and is typically the maximum operating temperature.

See Table 1 for the absolute maximum ratings table of a typical RF amplifier.

Table 1. Typical RF Amplifier Absolute Maximum Ratings
Parameter Rating
Drain Bias Voltage (VDD) 60 V dc
Gate Bias Voltage (VGG1) −8 V to 0 V dc
Radio Frequency (RF) Input Power (RFIN) 35 dBm
Continuous Power Dissipation (PDISS) (T = 85°C) (Derate 636 mW/°C Above 85°C) 89.4 W
Thermal Resistance, Junction to Back of Paddle (θJC) 1.57°C/W
Temperature Range  
Storage −55°C to +150°C
Operating −40°C to +85°C
JunctionTemperature (TJ) to Maintain 1,000,000 Hour Mean Time to Failure (MTTF) 225°C
Nominal Junction Temperature
(TCASE = 85°C, VDD = 50 V)
187°C

For LFCSP and flange packages, the package case is assumed to be the metal slug on the bottom of the package.

Maximum Junction Temperature

In a given data sheet, the maximum junction temperature is specified in the absolute maximum ratings table for each product and depends on the semiconductor process of the device. In Table 1, the maximum junction temperature to maintain a 1,000,000 hour MTTF, is specified at 225°C. This specified temperature is typical for a gallium nitride (GaN) device. Exceeding this limit results in decreased device lifetime and premature device failure.

Operating Temperature Range

The operating temperature (TCASE) for the device is specified at the package base. TCASE is the temperature of metal slug on the bottom of the package. Operating temperature is not the temperature of the air around the device.

If TCASE and PDISS are known, the junction temperature (TJ) can be easily calculated. For example, if TCASE is 75°C and PDISS is 70 Watts, TJ is calculated using the following equation:

equation3

TJ is the most critical specification when considering device reliability and must never be exceeded. By contrast, TCASE can exceed the specified absolute maximum rating if TJ can be held below its maximum allowable level by reducing PDISS. The derating specification, 636 mW/°C in this case, can be used to calculate the maximum allowable PDISS as the case temperature exceeds its specified maximum level of 85°C. For example, using the data in Table 1, a TCASE of 95°C is permissible if PDISS is limited to 83 W. PDISS is calculated using the following equation:

equation4

This PDISS value results in a junction temperature of 225°C, calculated using the equation:

equation5

Thermal Model of the Device and PCB Environment

To fully understand the complete thermal environment around the device, the thermal paths and materials of the device must be modeled. Figure 1 shows a cross sectional schematic of a LFCSP package mounted to a PCB and heat sink. In this example, heat generates at the die and propagates through the package and the PCB to the heat sink. To determine the temperature at the junction of the device, the thermal resistance must be calculated. The thermal resistance, in conjunction with the heat flow, calculate the junction temperature. The junction temperature is then compared to the maximum specified junction temperature to determine if the device is operating reliably.

Figure 1. Thermal Model for a LFCSP Package Mounted to a PCB and Heat Sink.

Figure 1. Thermal Model for a LFCSP Package Mounted to a PCB and Heat Sink.

In Figure 1, the thermal paths from the device junction to the heat sink are defined as follows:

  • θJA is the thermal resistance from the device junction to the air around the top of the package.
  • θJC is the thermal resistance from the junction to the case, which is the metal slug on the bottom of the package.
  • θSN63 is the thermal resistance of the solder.
  • θCU is the thermal resistance of the copper plating on the PCB.
  • θVIACU is the thermal resistance of the copper plating of the via through holes.
  • θVIASN63 is the thermal resistance of the solder filling the via through holes.
  • θPCB is the thermal resistance of the PCB laminate material.

In a typical circuit board, there are multiple via holes and multiple layers of a PCB. In the Calculation of the Thermal Resistance of the System section, a thermal circuit is used to calculate each thermal resistance and to determine the overall thermal resistance of the device by combining the series and parallel thermal resistances.

Calculation of the Thermal Resistance of the System

For each thermal path, the thermal resistance is calculated using Equation 1. For each thermal resistance, the thermal conductivity of that material must be known. See Table 2 for the thermal conductivity of materials commonly used in PCB assemblies.

Table 2. Thermal Conductivities of Common PCB Materials
Material Thermal Conductivity (W/inK)
Copper (Cu) 10.008
Aluminum (Al) 5.499
Rogers 4350 (RO4350) 0.016
FR4 or G-10 Laminate 0.008
Alumina (Al2O3) 0.701
SN63 Solder 1.270
Thermally Conductive Epoxy 0.020
Gallium Arsenide (GaAs) 1.501
Plastic Mold Compound 0.019

Figure 2 shows the equivalent thermal circuit based on the thermal model in Figure 1. TPKG is the temperature at the base of the package, and TSINK is the temperature of the heat sink. In Figure 2, it is assumed that the ambient air temperature around the package (TA) is constant. In a real assembly contained within an enclosure, TA may increase as power dissipates. The thermal path to ambient air temperature is ignored in this analysis because θJA is much larger than θJC for LFCSP and flange packages that have a metal slug.

Figure 2. Equivalent Thermal Circuit.

Figure 2. Equivalent Thermal Circuit.

Thermal Resistance Example: HMC408LP3 Evaluation Board


The HMC408LP3 power amplifier uses an evaluation board that is 0.010 inches thick and constructed of Rogers RO4350 laminate. The ground pad layout shown in Figure 3 has an area of 0.065 inch × 0.065 inch with five 0.012 inch diameter via holes. The plating on the top and bottom of the circuit board is 1 oz copper (0.0014 inches thick). The via holes are plated through with ½ oz copper (0.0007 inches thick). During assembly, the via holes are filled with SN63 solder. Analysis shows that nearly all the heat current flows through the solder filled via holes. Therefore, the rest of the circuit board layout can be omitted in this analysis.

Figure 3. Ground Pad Layout.

Figure 3. Ground Pad Layout.

Each thermal resistance is calculated using Equation 1. To calculate θSN63, the thermal conductivity for the SN63 solder is 1.27 W/inK, the length (the thickness of the solder joint) is 0.002 inches, and the area is 0.004225 inches (0.065 inches × 0.065 inches).

equation6

Next, the copper plating on the top side of the PCB is calculated in similar fashion. The thermal conductivity of copper is 10.008 W/inK, the length is 0.0014 inches (1 oz copper), and the area is 0.00366 inches squared (in2).

equation7

The copper plating on the via hole has an area that is calculated by the formula:

equation8

where:

  • rO is the outer radius.
  • rI is the inner radius.

An outer radius of 0.006 inches and inner radius of 0.0053 inches calculate to an area of 0.00002485 in2 . The length of the via is the board thickness (0.010 inches) and the thermal conductivity of the copper is 10.008 W/inK.

equation9

Because there are five vias in parallel, the resistance is divided by five. Therefore, θVIACU = 8.05°C/W

The solder filling in the vias is calculated in similar fashion.

equation10

Because there are five filled vias, the equivalent thermal resistance is θVIASN63 = 17.85°C/W.

Next, the thermal resistance of the PCB material is calculated using a length of 0.010 inches, a thermal conductivity for Rogers RO4350 of 0.016 W/inK, and an area of 0.00366 in2.

equation11

From the equivalent thermal circuit in Figure 2, the parallel combination of the three thermal resistances (θPCB, θVIACU, and θVIASN63) is 5.37°C/W. Filling the vias with solder reduces the thermal resistance from 8.05°C/W to 5.37°C/W. Finally, adding the series combinations of the thermal resistances yields the thermal resistance of the entire PCB assembly.

equation12

where θASSY is the assembly thermal resistance.

Determining Dissipated Power

After the thermal resistance values are determined, the heat current (Q) must be determined. For RF devices, the value of Q is the difference between the total power entering the device and the total power leaving the device. Total power includes the RF power and dc power.

equation13

where:

  • PINTOTAL is the sum of the dc power and the RF input power.
  • POUTTOTAL is the power leaving the device and is the same as POUTRF.
  • PINRF is the RF input power.
  • PINDC is the dc input power.
  • POUTRF is the RF output power delivered to the load.

For the HMC408LP3 power amplifier, Equation 11 is used to calculate PDISS plotted in Figure 4. The following features of the amplifier are shown in Figure 4:

  • The device dissipates approximately 4 W of power with no RF input signal.
  • PDISS with an RF signal applied is frequency dependent.
  • There is an input power at which the device dissipates minimum power.

Figure 4. HMC408LP3 Power Dissipation vs. Input Power.

Figure 4. HMC408LP3 Power Dissipation vs. Input Power.

From the equivalent thermal resistance, θTOTAL, and Q, the junction temperature is calculated from:

equation14

equation15

For the quiescent condition with no RF input power, Q = 4 W and

equation16

Because the specified maximum junction temperature of the HMC408LP3 is 150°C, the temperature of the heat sink must be ≤71.6°C (that is, 78.4°C + 71.6°C = 150°C) when PDISS is 4W.

When the HMC408LP3 power amplifier is in normal operation (for example, input power ≤ 5 dBm), the dissipated power is less than 4W, suggesting that a heat sink temperature slightly higher than 71.6°C is permissible. However, if the amplifier is operating in deep compression with the input power equaling 15 dBm, PDISS increases and requires that the heat sink temperature be lower than 71.6°C.

Table 3. Thermal Worksheet
Description Value Unit Comments
Heat Sink Maximum Temperature 70 °C
θASSY 5.81 °C/W Calculated from equivalent thermal circuit
θJC 13.79 °C/W From data sheet
θTOTAL 19.6 °C/W Add θASSY and θJC
Q 4.0 W
Resulting Junction Temperature 148.4 °C Heat sink maximum temperature + (θTOTAL × Q); do not exceed maximum channel temperature listed in data sheet

Reliability

The expected lifetime of a component is strongly dependent on the operating temperature. Operation at temperatures below the maximum junction temperature increases the lifetime of the device. Exceeding the maximum junction temperature reduces the lifetime. Therefore, performing thermal analysis ensures that the specified maximum junction temperature is not exceeded under the expected operating conditions.

Conclusion

Surface-mount power RF amplifiers in LFCSP and flange packages with low junction to case thermal impedance force the PCB to function not only as the RF interconnection between devices, but also as the primary path to conduct heat away from the power amplifier.

As a result, θJC displaces θJA as the key thermal impedance metric of a LFCSP or flange package.

The most critical metric in these calculations is the junction or channel temperate (TJ) of the RF amplifier. Other nominal limits such as TCASE can be exceeded as long as the maximum junction temperature is not exceeded.

Author

Eamon Nash

Eamon Nash

Eamon Nash is an applications engineering director at Analog Devices. He has worked at ADI in various field and factory roles covering mixed-signal, precision, and RF products. He is currently focused on RF amplifiers and beamformer products for satellite communications and radar. He holds a Bachelor of Engineering (B.Eng.) degree in electronics from University of Limerick, Ireland and five patents.