MAX9324

One-to-Five LVPECL/LVCMOS Output Clock and Data Driver

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Part Details

  • Differential Output-to-Output Skew
  • 1.7psRMS Added Random Jitter
  • 150ps (max) Part-to-Part Skew
  • 450ps Propagation Delay
  • Synchronous Output Enable/Disable
  • Single-Ended Monitor Output
  • Outputs Assert Low when CLK, active-low CLK are Open or at GND
  • 3.0V to 3.6V Supply Voltage Range
  • -40°C to +85°C Operating Temperature Range
MAX9324
One-to-Five LVPECL/LVCMOS Output Clock and Data Driver
MAX9324: Typical Operating Circuit
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Hardware Ecosystem

Parts Product Life Cycle Description
Level Translators 3
MAX9315 PRODUCTION 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9311 PRODUCTION 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9312 PRODUCTION Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
Product 5
MAX9316 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9313 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9314 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9325 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9326 1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver
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