MAX19527
Ultra-Low-Power, Octal, 12-Bit, 50Msps, 1.8V ADC with Serial LVDS Outputs
Ultra-Low-Power, High-Speed ADC with 8 Channels for
Multichannel Medical Imaging Applications
Part Details
- Ultra-Low-Power Operation
- 55mW per Channel at 50Msps
- Single 1.8V Power Supply
- Excellent Dynamic Performance
- 69dBFS SNR at 5.3MHz
- 140dBc/Hz Near-Carrier SNR at 1kHz Offset from a 5.3MHz Tone
- 84dBc SFDR at 5.3MHz
- 90dB Channel Isolation at 5.3MHz
- User-Programmable Adjustment and Feature Selection through an SPI Interface
- Serial LVDS Outputs with Programmable Current Drive and Internal Termination
- Programmable Power Management
- Internal or External Reference Operation
- Single-Ended or Differential Clock Input
- Programmable Output Data Format
- Built-In Output Data Test Patterns
- Small, 10mm x 10mm, 144-Lead CTBGA Package
- Evaluation Kit Available (Order MAX19527EVKIT+)
The MAX19527 is an octal, 12-bit analog-to-digital converter (ADC), optimized for the low-power and high-dynamic performance requirements of medical imaging instrumentation and digital communications applications. The device operates from a single 1.8V supply and consumes 440mW (55mW per channel), while providing a 69dBFS signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the device features programmable power management for idle states and reduced-channel operation.
An internal 1.25V precision bandgap reference sets the full-scale range of the ADC to 1.5VP-P. A flexible reference structure allows the use of an external reference for applications requiring greater gain accuracy or a different input voltage range. A programmable common-mode voltage reference output is provided to enable DC-coupled input applications.
Various adjustments and feature selections are available through programmable registers that are accessed through the 3-wire serial peripheral interface (SPI™).
A flexible clock input circuit allows for a single-ended, logic-level clock or a differential clock signal. An on-chip PLL generates the multiplied (6x) clock required for the serial LVDS digital outputs. The serial LVDS output provides programmable test patterns for data timing alignment and output drivers with programmable current drive and programmable internal termination.
The device is available in a small, 10mm x 10mm x 1.2mm, 144-lead thin chip ball grid array (CTBGA) package and is specified for the extended industrial (-40°C to +85°C) temperature range.
Applications
- Instrumentation
- Multichannel Communications
- Ultrasound and Medical Imaging
- ZIF GSM and TD-SCDMA Transceivers
Documentation
Data Sheet 1
Reliability Data 1
Technical Articles 4
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
Evaluation Kits
Evaluation Kit for the MAX19527
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