DS33Z11
Ethernet Mapper
Part Details
The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 (LAPS) for transmission over a PDH/TDM data stream. The serial link supports bidirectional-synchronous interconnect up to 52Mbps over xDSL, T1/E1/J1, T3/E3, V.35/Optical, OC-1/EC-1, or SONET/SDH Tributary.
The device performs store-and-forward of packets with full wire-speed transport capability. The built-in Committed Information Rate (CIR) controller provides fractional bandwidth allocation up to the line rate in increments of 512kbps. The DS33Z11 can operate with an inexpensive external processor, EEPROM or in a stand-alone hardware mode.
Applications
- Ethernet Delivery Over T1/E1/J1, T3/E3, OC-1/EC-1, G.SHDSL, or HDSL2/4
- LAN Extension
- Transparent LAN Service
Documentation
Data Sheet 1
Reliability Data 1
Application Note 1
Design Note 1
Technical Articles 1
Evaluation Design File 1
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
Tools & Simulations
S-Parameter 1
IBIS Model 1
BSDL Model File 1
Evaluation Kits
Latest Discussions
No discussions on ds33z11 yet. Have something to say?
Start a Discussion on EngineerZone®