DS3162
Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1
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Part Details
- Single (DS3161), Dual (DS3162), Triple (DS3163), or Quad (DS3164) ATM/Packet PHYs for DS3, E3, and Clear-Channel 52Mbps (CC52)
- Pin Compatible for Ease of Port Density Migration in the Same PC Board Platform
- Each Port Independently Configurable
- Universal PHYs Map ATM Cells and/or HDLC Packets into DS3 or E3 Data Streams
- UTOPIA L2/L3 or POS-PHY™ L2/L3 or SPI-3 Interface with 8-, 16-, or 32-Bit Bus Width
- 66MHz UTOPIA L3 and POS-PHY L3 Clock
- 52MHz UTOPIA L2 and POS-PHY L2 Clock
- Ports Independently Configurable for Cell or Packet Traffic in POS-PHY Bus Modes
- Direct, PLCP, DSS, and Clear-Channel Cell Mapping
- Direct and Clear-Channel Packet Mapping
- On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or G.832) Framer(s)
- Ports Independently Configurable for DS3, E3 (Full or Subrate) or Arbitrary Framing Protocols Up to 52Mbps
- Programmable (Externally Controlled or Internally Finite State Machine Controlled) Subrate DS3/E3
The DS3161, DS3162, DS3163, and DS3164 (DS316x) integrate ATM cell/HDLC packet processor(s) with DS3/E3 framer(s) to map/demap ATM cells or packets into as many as four DS3/E3 digital lines with DS3-framed, E3-framed, or clear- channel data streams on per-port basis.
Applications
- Access Concentrators
- ATM and Frame Relay Equipment
- Digital Cross-Connects
- Integrated Access Device (IAD)
- Multiservice Access Platform (MSAP)
- Multiservice Protocol Platform (MSPP)
- PBXs
- PDH Multiplexer/Demultiplexer
- Routers/Switches
- SONET/SDH ADM
- SONET/SDH Muxes
- Test Equipment
Documentation
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Product 4 | ||
| DS3181 | Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU | |
| DS3182 | Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU | |
| DS3183 | Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU | |
| DS3184 | Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU | |
Tools & Simulations
IBIS Model 1
BSDL Model File 1
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