DS21Q354

Quad T1/E1 Transceiver (3.3V, 5.0V)

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Part Details

  • Four completely independent T1 or E1 transceivers in one small 27mm x 27mm package
  • Each transceiver contains a short and long haul line interface plus a full featured framer with alarm detection/generation, elastic-stores, hardware based signaling support, per DS0 channel control and HDLC controller
  • Each multi-chip module (MCM) contains four die of
    • DS21352 (DS21Q352)
    • DS21552 (DS21Q552)
    • DS21354 (DS21Q354)
    • DS21554 (DS21Q554)
  • See the specific DS21352/DS21552 and DS21354/DS21554 data sheets for details on their feature set and operation
  • All four T1 or E1 transceivers can be concatenated into a single 8.192MHz backplane data stream
  • IEEE 1149.1 JTAG-Boundary Scan architecture
  • DS21Q352/DS21Q552 and DS21Q354/DS21Q554 are pin compatible to allow the same footprint to support T1 and E1 applications
  • 256-pin MCM BGA package (27mm X 27mm)
  • Low power 5V CMOS or low power 3.3V CMOS with 5V tolerant input and outputs
DS21Q354
Quad T1/E1 Transceiver (3.3V, 5.0V)
DS21Q352, DS21Q354, DS21Q552, DS21Q554: Schematic
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Tools & Simulations

BSDL Model File 1

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