ADSP-2162

Obsolete

DSP Microcomputers With ROM

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Part Details

  • 25 MIPS, 40 ns Maximum Instruction Rate (5 V)
  • Separate On-Chip Buses for Program and Data Memory
  • Program Memory Stores Both Instructions and Data (Three-Bus Performance)
  • Dual Data Address Generators with Modulo and Bit-Reverse Addressing
  • Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup
  • Double-Buffered Serial Ports with Companding Hardware, Automatic Data Buffering and Multichannel Operation
  • Three Edge- or Level-Sensitive Interrupts
  • Low Power IDLE Instruction
  • PLCC and MQFP Packages
ADSP-2162
DSP Microcomputers With ROM
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Documentation

Data Sheet 1

Application Note 52

Technical Articles 2

Processor Manual 1

Software Manual 5

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Software Resources

Software & Tools Anomaly 1

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