ADSP-2161
ObsoleteDSP Microcomputers With ROM
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Part Details
- 25 MIPS, 40 ns Maximum Instruction Rate (5 V)
- Separate On-Chip Buses for Program and Data Memory
- Program Memory Stores Both Instructions and Data (Three-Bus Performance)
- Dual Data Address Generators with Modulo and Bit-Reverse Addressing
- Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup
- Double-Buffered Serial Ports with Companding Hardware, Automatic Data Buffering and Multichannel Operation
- Three Edge- or Level-Sensitive Interrupts
- Low Power IDLE Instruction
- PLCC and MQFP Packages
The ADSP-216x processors provide the option of custom ROM programming to users of ADSP-2100 Family devices. Pin compatible to the ADSP-2101, -2115, and -2105, the ADSP-216x family can reduce system cost in these designs by eliminating the need for any external memory devices.
Documentation
Data Sheet 1
Application Note 57
Technical Articles 2
Processor Manual 2
Software Manual 5
This is the most up-to-date revision of the Data Sheet.
Software Resources
Software & Tools Anomaly 1
Evaluation Software 0
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