ADSP-21160N
PRODUCTIONHigh Performance 32-Bit SHARC DSP, 100 MHz
- Part Models
- 1
- 1ku List Price
- price unavailable
Part Details
- 100 MHz (10.5 ns) Core Instruction Rate
- Single-Cycle Instruction Execution, Including SIMD Operations in Both Computational Units
- 570 MFLOPS Peak and
380 MFLOPS Sustained Performance (Based on FIR) - Dual Data Address Generators (DAGs) with Modulo and Bit-Reverse Addressing
- EEE 1149.1 JTAG Standard Test Access Port and On-Chip Emulation
- Zero-Overhead Looping and Single-Cycle Loop Setup, Providing Efficient Program Sequencing
- 400-Ball 27 × 27 mm Metric PBGA Package
- Single Instruction Multiple Data (SIMD) Architecture provides two computational processing elements, concurrent execution and code compatibility at assembly level with the ADSP-2106x SHARC DSP family
The ADSP-21160N SHARC® DSP is the second iteration of the ADSP-21160. Built in a 0.18 micron CMOS process, it offers higher performance and lower power consumption than its predecessor, the ADSP-21160M. Easing portability, the ADSP-21160N is application source code compatible with first generation ADSP-2106x SHARC DSPs in SISD (Single Instruction, Single Data) mode. To take advantage of the processor’s SIMD (Single Instruction, Multiple Data) capability, some code changes are needed. Like other SHARCs, the ADSP-21160N is a 32-bit processor that is optimized for high performance DSP applications. The ADSP-21160N includes a 100 MHz core, a dual-ported on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal buses to eliminate I/O bottlenecks.
The ADSP-21160N introduces Single-Instruction, Multiple-Data (SIMD) processing. Using two computational units (ADSP-2106x SHARC DSPs have one), the ADSP-21160N can double performance versus the ADSP-2106x on a range of DSP algorithms.
The ADSP-21160N continues SHARC’s industry-leading standards of integration for DSPs, combining a high-performance 32-bit DSP core with integrated, on-chip system features. These features include a 4M-bit dual ported SRAM memory, host processor interface, I/O processor that supports 14 DMA channels, two serial ports, six link ports, external parallel bus, and glueless multiprocessing.
Documentation
Data Sheet 1
User Guide 1
Application Note 35
Processor Manual 4
Product Highlight 1
Integrated Circuit Anomaly 1
Legacy Emulator Manual 2
Legacy Evaluation Kit Manual 2
Product Highlight 1
Product Selection Guide 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADSP-21160NCBZ-100 | 400-Ball PBGA (27mm x 27mm) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
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Aug 23, 2023 - 23_0004 Assembly Site Transfer of Select PBGA Products to ASE Kaohsiung (AEG) |
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| ADSP-21160NCBZ-100 | ||
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Jul 14, 2021 - 20_0165 Assembly Transfer of Select PBGA Products to ASE Chungli (AET) |
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| ADSP-21160NCBZ-100 | ||
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Jun 18, 2010 - 07_0093 Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts |
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| ADSP-21160NCBZ-100 | ||
This is the most up-to-date revision of the Data Sheet.
Software Resources
Software & Tools Anomaly 1
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
View DetailsEvaluation Software 0
Tools & Simulations
Evaluation Kits
USB-Based Emulator and High Performance USB-Based Emulator