ADN2905

NOT RECOMMENDED FOR NEW DESIGNS

CPRI and 10G Ethernet Data Recovery IC with AMP/EQ from 614.4 Mbps to 10.3125 Gbps

Part Models
2
1ku List Price
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Part Details

  • Serial CPRI data rates
    • 614.4 Mbps, 1.2288 Gbps, 2.4576 Gbps, 3.072 Gbps, 4.9152 Gbps, 6.144 Gbps, and 9.8304 Gbps
  • Ethernet data rates: 1.25 Gbps and 10.3125 Gbps
  • No reference clock required
  • Jitter performance superior tothe SFF-8431 jitter specifications
  • Optional equalizer or 0 dB EQ input mode
  • Quantizer sensitivity:
    200 mVp-p typical (equalizer mode)
  • Sample phase adjust (5.65 Gbps or greater)
  • Output polarity invert
  • I2C to access optional features
  • Loss of lock (LOL) indicator
  • PRBS generator/detector
  • See data sheet for additional features
ADN2905

CPRI and 10G Ethernet Data Recovery IC with AMP/EQ from 614.4 Mbps to 10.3125 Gbps

ADN2905 Functional Block Diagram ADN2905 Pin Configuration
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Evaluation Kits

eval board
EVAL-ADN29XX

ADN2905/ADN2913/ADN2915/ADN2917 Evaluation Board

Features and Benefits

  • Full featured evaluation board for the ADN2905/ADN2913/ADN2915/ADN2917
  • Configurable as PRBS generator or PRBS error detector
  • Locked to any rate, continuous mode, up to 11.3 Gbps input signal

Product Details

The ADN2905, ADN2913, ADN2915, and ADN2917 provide the receiver functions of quantization, signal level detect, and clock/data recovery for a continuous signal data rate range from 6.5 Mbps to 11.3 Gbps. The ADN29xx automatically lock to such a data signal without referring to an external clock or extra programming. All SONET/SDH jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for the –40°C to +85°C temperature range, unless otherwise noted.


For the best input signal detection, the ADN29xx input circuitry can be configured as a limiting amplifier, an equalizer, or a 0 dB equalizer. Additionally, the ADN29xx provide manual control of sampling phase and slice level adjust to optimize the incoming data eye detection.


The loss of signal (LOS) is available in limiting amplifier input mode only. The asserted LOS indicates that the input signal level has fallen below a preset threshold. The LOS detect circuit provides a typical 6.0 dB hysteresis to prevent LOS output chatter.


The asserted loss of lock (LOL) indicates when incoming signal rate shifts more than 1000 ppm away from the CDR VCO frequency.


The ADN29xx are available in a compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP).


Full specifications on the ADN2905/ADN2913/ADN2915/ADN2917 are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board.


The ADN2905, ADN2913, ADN2915, and ADN2917 are pin-to-pin compatible devices and share the same evaluation board. Each EVALZ-ADN29xx evaluation board is populated by a different DUT: ADN2905 on the EVALZ-ADN2905, ADN2913 on the EVALZ-ADN2913, ADN2915 on the EVALZ-ADN2915, and ADN2917 on the EVALZ-ADN2917.

EVAL-ADN29XX
ADN2905/ADN2913/ADN2915/ADN2917 Evaluation Board
EVALZ-ADN2905_EVALZ-ADN2913_EVALZ-ADN2915_EVALZ-ADN2917

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