Control Loop Simulation Done the Easy Way

摘要

This article explains a simple way to do a control loop simulation. A Bode plot can be easily generated using LTspice^®.

Introduction

When designing a power supply, it is important to examine the control loop carefully. A poorly set control loop can lead to oscillation or unstable operation of the power converter. The oscillation leads to an excessively high voltage ripple at the output and degrades electromagnetic compatibility (EMC) performance. An unfavorably set control loop can also slow the response of the voltage converter to load transients and changes in supply voltage.

Simple Steps to Check a Control Loop

A Bode plot provides a useful basis for checking a control loop. It can be generated easily and quickly with a simulation tool such as LTspice Version 17.1 or higher. The three steps in performing a Bode plot simulation are discussed in this article.

Step 1 is to use LTspice to open the power circuit, for example, a switching regulator circuit. Figure 1 shows the circuit of an ADP2370 step-down switching regulator. In LTspice, the test fixture, that is, the external circuitry, can be selected as a ready-made circuit. After the circuit comes up on the display, select a frequency response analyzer (FRA) from the “Component” tab. This is added above the upper voltage divider resistor (R1). Figure 1 shows the FRA used in this example.

Next, select a simulation type for the generation of a Bode plot. This is shown as “.fra” in Figure 1.

Before the Bode plot simulation is started, the desired parameters must be entered. There are numerous optimization possibilities. Right-clicking on the FRA component opens a window in which the Bode plot settings can be set. The “Help Me Configure This for a Switching Regulator” option circled in red in Figure 2 makes things easy with automated configuration.

Enter the DC output voltage of the switching regulator, the switching frequency, and the expected regulator bandwidth (the 0 dB crossover frequency). After these are set, press the simulation key.

Figure 3 shows the Bode plot window, which opens automatically after the simulation process is finished. In a Bode plot, the frequency indicates the control loop bandwidth at the 0 dB crossover point. In the example, it is about 23 kHz. The stability of the control loop can be estimated through the phase margin. The phase margin is the phase shift of the control loop at the gain crossover frequency 0 dB, labeled “gain_1” in Figure 3. The phase margin should be greater than 40°. In the example, it is about 53°. This means that the switching regulator is sufficiently stable.

Conclusion

With LTspice Version 17.1 and higher, creating a Bode plot has become much simpler now that an FRA module is available. Additionally, simulation time is now much shorter due to optimized simulation calculations. This makes optimization of a switching regulator’s control loop easy.

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