20 GHz Direct Sampling: All in One Nyquist—Part 2: Quadrature Interleaving

Read other articles in this series.

• 20 GHz Direct Sampling: All in One Nyquist—Part 1: Challenges and Approaches

摘要

Direct RF sampled systems are evolving to encompass broader capabilities, allowing them to capture a wider bandwidth all in a single Nyquist zone. Sampling from 2 GHz to 18 GHz concurrently enables more sophisticated options to monitor a larger spectrum, without issues of frequency band aliasing. Quadrature interleaving offers a novel solution to expand sampling bandwidth without the complexities of managing double rate clocks, clock inversion, or doubling the data output.

Introduction

Part 1 describes the interleaving objectives, discusses errors creating interleaving artifacts, and introduces the range of 40 GSPS analog-to-digital converter (ADC) options using the AD9084. Part 2 explores the quadrature sampling option, along with a quadrature correction mechanism in detail.

An emerging capability that is enhancing data converter products is the significant inclusion of embedded digital signal processor (DSP) cores. A relevant example of showcasing embedded DSP included in modern ADCs is to double the effective sample rate without increasing the back-end digital data rates. Using two ADCs with quadrature inputs and a quadrature correction algorithm, a dual 40 GSPS ADC can be configured to produce four 4 GHz digitally downconverted outputs, monitoring a 2 GHz to 18 GHz bandwidth, within a single multichannel converter IC.

First, direct quadrature sampling is described relative to the more common zero IF (ZIF) architectures. Quadrature errors are acknowledged, along with a description of the embedded digital processing needed for quadrature error correction (QEC). Analog RF front-end components, sampling of ADC data, embedded DSP processing, and final processing of data converter I/Q outputs are used. The measured results show amplitude and phase errors both before and after QEC, and the final measured image rejection demonstrates effective direct quadrature sampling from 2 GHz to 18 GHz. The approach is described for the AD9084 IC, yet is generally extendable to any wideband sampling system.

Quadrature Sampling Principles

A traditional ZIF architecture is shown in Figure 1.¹ The architecture creates two IF signals in quadrature (90° out of phase) through a quadrature RF downconverting mixer. In this case, the quadrature is created in the local oscillator (LO) circuitry from two sets of physically separated mixers and LOs, each 90° out of phase. The result is two IF frequencies in quadrature. The ability to resolve whether the RF is above or below the LO frequency is visualized by a phase reversal between the I and Q signals at the LO frequency, as shown in Figure 1. Digital downconverters (DDCs) processing real data converter data streams and creating an I/Q output data stream at a reduced bandwidth centered by a numerically controlled oscillator (NCO) are also enabled by these same principles.

 

The principles in Figure 1 enable the description of direct quadrature sampling. If the 90° phase shift is moved such that two parallel ADCs simultaneously sample the same RF input placed in quadrature, there is a phase reversal of the I/Q signals at the Nyquist boundary through the sampling process. This property can be exploited to effectively double the ADC sample rate and is shown in Figure 2.

In practice, the 90° phase shift is accomplished with a hybrid coupler, also marketed as a hybrid splitter. Wideband hybrid couplers are now available covering a 2 GHz to 18 GHz bandwidth.

Quadrature Errors

A well-known issue in quadrature sampling is any phase or amplitude mismatch in the I/Q balance creates unwanted perceived energy at the image frequency. This issue also applies to the direct quadrature sampling approach and needs to be addressed with a back-end algorithm.² The operational concern is shown in Figure 2. The concern is that an unwanted signal in the image band can fold back into the signal band. The level of the image is a function of the amplitude and phase mismatch from the ideal quadrature and creates the need for a QEC method.

 

 

Image rejection levels can be calculated as follows:

IRR = Image Reject Ratio (dB)

P = 10^(IRR/10)

A = Amplitude Mismatch

θ = Phase Error

For a given IRR and amplitude error

For a given IRR and phase error

Figure 3 plots the image rejection magnitude vs. the required amplitude and phase error. As an example, a 60 dBc image rejection magnitude requires a phase accuracy of less than one-tenth of a degree and an amplitude match to within hundredths of a dB. This level of image rejection is not practical in hardware alone using the accuracy of currently available commercial RF components. Therefore, to utilize the direct quadrature sampling approach, additional digital error correction is needed. The configurations used for QEC will be described in the following sections.

Quadrature Sampling with Programmable Filter (PFILT) QEC

A block diagram of the AD9084 configuration for direct quadrature sampling with PFILT QEC is shown in Figure 4. For the measured FFTs shown, the input frequency was set to 7.1 GHz, the NCO in Channel 1 was set to 7 GHz, and the input signal appeared in the baseband data at 100 MHz. The image frequency is mirrored around f_s/2 and appears at 12.9 GHz. The channel 2 NCO was set to 13 GHz to monitor the image frequency that appears in the baseband output at –100 MHz.

The sequence of steps for test data in subsequent figures is as follows:

A functional verification is performed, then the background ADC calibrations are frozen to prevent deviations across channels due to further ADC calibrations. Next, the frequency was swept in 25 MHz steps across a 4 GHz BW. For each data capture, the NCO1 frequency was set to Fin – 100 MHz and for the second NCO, NCO2, the frequency was set to 20 GHz – NCO1 frequency. This results in both NCO frequencies mirroring the sample rate divided by two, f_s/2.

Based on measured Ch1 and Ch2 data, quadrature correction coefficients are then calculated and applied to the embedded FIR as seen in Figure 5. Additional data was retaken and the post QEC performance was then evaluated. This sequence was repeated four times to cover the full 2 GHz to 18 GHz operating range.

The result of 4 GHz bandwidth corrections is shown below. The AD9084 has four banks of filter coefficients that can be rapidly selected. This programmable feature allows the used coefficients to be optimized based on the input frequency of interest based, given the programmed NCO frequency.

The suitability of the half-complex PFILT structure can be illustrated with a simple example. The direct quadrature sampling configuration involves splitting the signal into separate I and Q paths that are each sampled by individual ADCs.

 

QEC is a relative form of equalization. For example, the I path can be thought of as ideal, and the Q path can be matched to the I path. Therefore, the response of the Q path can be modeled as the combination of (a) a nominal 90° phase shift, (b) the common response of the I path, and (c) a mismatch or delta response of the Q path relative to the I path as shown in Figure 6.

 

Figure 7 shows the result of stimulating this relative quadrature sampling model with a sinusoidal input x(t) = cos(ω₀t). The nominal 90° phase shift converts a cosine to a sine, and the delta response H_Δ(ω) = A_Δ(ω)e^{(jθΔ (ω))} modifies the amplitude and phase of the result.

 

Using a simple trigonometric identity, the output of the Q path can be decomposed into sine and cosine parts.

In the absence of a mismatch between the I and Q paths (H_Δ (ω) = 1), the ideal outputs of the quadrature sampling configuration can be defined as:

Therefore, for a sinusoidal or other narrowband signal centered at frequency ω0, the actual quadrature outputs can be written in terms of the ideal quadrature outputs. The direct quadrature configuration can be viewed as a 2 × 2 linear system that generates quadrature error. QEC is performed by inverting this 2 × 2 linear system to recover the ideal outputs x_i (t) and x_q(t).

 

The analysis in Figure 8 describes the generation and correction of quadrature error when the system is stimulated at a single frequency. Because the 2 × 2 system is linear, the solution is easily generalized to wideband signals by introducing multitap FIR filters that vary their amplitude and phase responses over frequency.

Quadrature Sampling with CFIR QEC

The PFILT runs at the full 20 GSPS sample rate behind each ADC. The AD9084 also includes a complex FIR (CFIR) after the decimation. The benefit of using this filter is that the correction can be applied over a longer time without increasing the number of filter taps. To accomplish this, both complex DDCs (CDDCs) are used. The second CDDC shifts the image frequency to be the negative frequency of the image within the primary DDC. By summing a weighted version of the complex conjugate of the second CDDC, an image cancellation is created. The approach is shown in Figure 9.

The CFIR performs QEC in the same way that the PFILT does. The only difference is that the correction is applied to the decimated output. To show that this is the case, the PFILT can be viewed as a network of complex filters, as opposed to the 2 × 2 linear system that was previously described. The 2 × 2 linear system has the form shown below, where the inputs, outputs, and filter coefficients are all real-valued, and the * symbol indicates convolution.

If these real-valued signals are combined and interpreted as complex-valued signals, then the following properties hold true.

By defining y[n] = y_i [n] + jy_q [n] and substituting via the properties given above, the complex-valued interpretation of the half-complex PFILT structure can be derived.

The result is an alternative interpretation of the effect of the PFILT that involves:

1. Applying a complex-valued linear filter b₁[n] to the complex-valued input y[n]. Filter b₁[n] performs an in-band equalization of Q compared to I in order to preserve the flatness of the desired signal.
2. Applying a complex-valued linear filter b₂[n] to the complex-valued input y[n]. Filter b₂[n] transforms the blocker signal into an anti-image that will sum destructively with the unwanted image.
3. Summing the output of the first filter with the complex conjugate of the output of the second filter. Conjugation in time causes a flip in frequency that aligns the blocker and its image in frequency, allowing a scaled and rotated version of the blocker to sum destructively with its image.

These are the exact steps performed by the DDCs and CFIRs to achieve QEC.

1. DDC1 downconverts the desired signal, and CFIR1 applies a complex-valued linear filter with response equivalent to b₁[n] (but shifted in frequency and applied at a lower sampling rate).
2. DDC2 downconverts the blocker signal, and CFIR2 applies a complex-valued linear filter with response equivalent to b₂[n] (but shifted in frequency and applied at a lower sampling rate).
3. Summing the outputs of CFIR1 and CFIR2 results in the image rejection.

Example FFT measurements using the CFIR to achieve QEC are shown in Figure 10.

 

Quadrature Error Training Approach

The Quadrature Sampling with Programmable Filter section explains that discrepancies between the I and Q paths lead to quadrature errors. It also details how, if these mismatches were identified, the errors could be rectified using the half-complex PFILT structure. The Quadrature Sampling with CFIR QEC section proves that the same QEC can also be deferred to the CFIRs at the outputs of the DDCs. In both cases, the coefficients of the ideal correction filters depend on the mismatch response between the I and Q paths. This section describes one way that the mismatch response can be estimated.

Multiple types of QEC algorithms exist. One way of differentiating between algorithms is based on the input stimulus used for training.

• Online calibrations are conducted while the system remains active, normally training opportunistically using whatever input signal is presented to the ADC. These calibrations can run in the background for extended periods and can adapt to changes in I/Q mismatch due to drifts in temperature, supply, and timing.
• Offline calibrations function when the system is not active. Because the system is offline, known calibration signals can be injected for training purposes. Once training is completed, the system can be brought back online, operating with fixed correction coefficients. Depending on the use case, the system might require periodic recalibration as system parameters drift. The system must be brought offline again during recalibration.

The choice of online or offline calibration is application specific, as there are pros and cons to both approaches. The remainder of this discussion focuses on a form of offline calibration that injects a series of calibration tones into the system.

This calibration defines two bands of interest as shown in Figure 11.

• The desired band covers the desired output bandwidth of the system.
• The blocker band is mirrored across f_s/2 relative to the desired band, where f_s is the ADC sampling rate. For example, if the desired band spans from frequency f1 to frequency f2, then the blocker band spans from f_s - f2 to f_s - f1. Large blocking signals that appear within the blocker band will generate a false image that falls within the desired band.

These two bands of interest can span anywhere within DC to f_s/2 and can overlap.

 

With respect to these two bands of interest, the QEC calibration has two objectives.

1. Reject images that fall within the desired band.
2. Preserve signals that fall within the desired band by matching the in-band gain and phase response of the Q path to the in-band gain and phase response of the I path. This is a relative form of equalization. The Q path is matched to the I path, but any droop within the I path is preserved.

These two objectives are related through I/Q mismatch. As the Q path is matched to the I path, both in-band flatness and out-of-band image rejection are improved simultaneously. Therefore, to achieve both objectives, the calibration must learn the I/Q mismatch for both the desired band and the blocker band, and then tune the coefficients of the correction filter to perform relative Q-to-I equalization across both bands.

However, the two objectives are not necessarily weighted equally. For many applications, from an I/Q matching perspective, in-band flatness requirements can be met with a relatively coarse I/Q matching, while image rejection targets typically require much more accurate I/Q matching.

Table 1 shows the in-band gain and phase errors corresponding to various levels of image rejection. For example, if an application requires 1° in-band flatness and –50 dBc image rejection, the I/Q matching required to achieve the image rejection target is approximately five times more precise than what is needed for in-band flatness.

Table 1. Minimum Errors Required for Image Rejection Performance

Image Rejection (dBc)	In-Band Gain Error (dB)	In-Band Phase Error (deg)
–20	0.9151	5.7106
–30	0.2791	1.8112
–40	0.0873	0.5729
–50	0.0275	0.1812
–60	0.0087	0.0573

Table 2 shows an example training algorithm that applies an unequal weighting for the flatness compared to the image rejection objectives. Calibration tones are injected within the desired band so that in-band flatness can be improved within the desired band. Calibration tones are injected within the blocker band so that images that fall within the desired band can be attenuated. When the desired band spans across f_s/2, then the desired band and the blocker band overlap. Calibration tones that fall within the overlap region can be labeled as if they fall within the blocker band, thus giving them a larger weighting factor to achieve the more difficult image rejection objective.

Table 2. Training Algorithm

Offline Tone-Based QEC calibration
	Define a set of tone frequencies fk for k = 1,…,K that span the union of the desired band and the blocker band.
	Define a weighting factor λin for in-band flatness objective.
	Define a weighting factor λout for the out-of-band image rejection objective.
	For each training tone at frequency fk
		perform time-aligned captures at the outputs of each of the I and Q ADCs
		compare the Q capture data to the I capture data via cross-correlations or other means to estimate the mismatch response Hk = HΔ(fk) = Hq(fk)/Hi(fk)
		if fk falls within the blocker band
			assign this training point a weight of λk = λout
		else
			assign this training point a weight of λk = λin
		end
	end
	Perform some form of weighted regression to solve for filter coefficients that minimize I/Q mismatch given fk, λk, Hk for k = 1, …, K.

Measured Quadrature Sampling Image Rejection Results

 

Measured image rejection results are shown in Figure 12. Results for both the PFILT and CFIR corrections are shown. Using the CFIR correction, an image rejection of >50 dBc is obtained. The results using the PFILT are slightly degraded, and the root cause can be seen from the data shown in Figure 13. When evaluating the amplitude and phase mismatch before and after QEC, note that fairly gross errors are corrected, but a rapid ripple across frequency remains after correction.

The PFILT runs at the full sample rate, while the CFIR runs at the decimated reduced sample rate. Because the PFILT and CFIR have a similar number of taps, this means that the CFIR can correct errors over a longer time period than the PFILT. The final result is that the CFIR provides a better correction for the test setup in use. However, the ripple is currently limited by impedance mismatch between the hybrid coupler and the ADC inputs and the long transmission lines between them. Simulations show that the ripple mismatch can be improved when the hybrid coupler is mounted adjacent to the ADC inputs that minimize small differences in signal path lengths.

 

Conclusion

Direct quadrature sampling from 2 GHz to 18 GHz has been demonstrated. The following features enabled the result:

1. A wideband quadrature hybrid
2. ADCs with an input bandwidth through the second Nyquist zone
3. A method to ensure ADC data is time aligned
4. A QEC FIR filter at the full ADC rate
5. A complex DDC to reduce data rates
6. A quadrature correction algorithm that resolves input imbalance errors within the reduced data rate DDC output bandwidth

The solution cannot be achieved using only a single feature from this list. It is the combination of all of these features that creates the solution. Without any one of these, undesirable trade-offs may be required, or performance would be significantly reduced, rendering the solution unusable.

The approach presented provides a method to double the effective ADC sample rate without doubling digital data rates yet still maintaining embedded DSP functionality. These benefits create a method to trade off channel count vs. ADC rate at the application level without ADC modifications. Direct quadrature sampling or quadrature interleaving is not a replacement for time interleaving, but rather an alternative to consider among many, as software-defined radio systems continue to mature.

关于作者

Ian Beavers

Ian Beavers是ADI公司（美国北卡罗来纳州格林斯博罗）高速模数转换器团队的应用工程师。他于1999年加入公司。他拥有超过18年的半导体行业工作经验。他于美国北卡罗来纳州立大学获得电气工程学士学位和北卡罗来纳大学格林斯博罗分校MBA学位。他是EngineerZone®高速ADC支持社区的会员。如有任何问题，请到ADI公司EngineerZone在线技术支持社区发送给IanB。

Peter Delos

Peter Delos是ADI公司航空航天和防务部的技术主管，在美国北卡罗莱纳州格林斯博罗工作。他于1990年获得美国弗吉尼亚理工大学电气工程学士学位，并于2004年获得美国新泽西理工学院电气工程硕士学位。Peter拥有超过25年的行业经验。其职业生涯的大部分时间都致力于高级RF/模拟系统的架构、PWB和IC设计。他目前专注于面向相控阵应用的高性能接收器、波形发生器和频率合成器设计的小型化工作。

Brian Reggiannini

Brian Reggiannini is a senior principal engineer in system design. He has designed, implemented, and supported system-level calibrations for several generations of Analog Devices’ wireless transceiver products. His technic...

Connor Bryant

Connor Bryant is a system applications engineer at Analog Devices working in the Aerospace and Defense Business Unit in Durham, North Carolina. He joined ADI in 2023. He is currently focused on RF mixed-signal chain design...