设计、搭建、测试
图示的电路板已装配完成且经过测试。

概览

设计资源

设计与集成文件

  • Schematic
  • PCB Layout
  • PCB Gerber files
  • BOM
下载设计文件 87.93 K

评估硬件

产品型号带"Z"表示符合RoHS标准。评估此电路需要下列选中的电路板

  • MAXREFDES34# ($26.20) EV Kit
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描述

MAXREFDES34

Smart factories, industrial and medical applications employ the flexibility and high performance of modern FPGAs. As these systems become increasingly connected, security emerges as a paramount feature to protect IP, enable system features using software and prevent counterfeiting. The Alcatraz (MAXREFDES34#) subsystem reference design uses the DS28E15 to immediately implement SHA-256 authentication on Xilinx® FPGAs. The DS28E15 communicates over the single-contact 1-Wire® bus, reducing the number of pins necessary to carry out the solution. The reference code defines a combined SHA-256 processor and 1-Wire Master on the host FPGA.

Figure 1. The Alcatraz subsystem design block diagram with development platform.

Figure 1. The Alcatraz subsystem design block diagram with development platform.

优势和特点

  • SHA-256 authentication
  • Single-contact 1-Wire interface
  • Example source code
  • Pmod-compatible form factor

Competitive Advantages

  • Crypto-strong authentication
  • Single pin count interface
  • Fast performance with hardware acceleration

Applications

  • Counterfeit protection
  • Peripheral authentication
  • IP protection
  • License and feature management

详情

文件和资源

支持与培训

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