MAXREFDESLiDAR1

The quad-channel LiDAR receiver front-end reference design features a 4-channel avalanche photodiode (APD) array from First Sensor, interfacing the Analog Quad TIA MAX40062 and Analog single fast comparator MAX40026.

The reference design implements test points to check each part of the board independently. Table 1 describes each critical piece of the board in detail with a focus on how to interface the APD to the trans-impedance amplifier (TIA) and the TIA to the comparator.

A special paragraph is dedicated to the layout recommendations.

Gain Selection Input (GAIN)

The J1 jumper is implemented to adjust the gain of the TIA. Set the gain to 25kΩ or 50kΩ in a static way in the application by connecting the GAIN pin to the GND or VCC permanently or have a dynamic signal controlled by a microprocessor to change the gain on the fly as required in the application. See Table 2 for more details.

Channel Selection

The SEL0 and SEL1 jumpers are used to select the channel sent to the comparator. The channel selection is static in this reference design. In a normal application, these two pins are connected to a microprocessor to control the channel to output dynamically. See Tables 4 and 5 for more details.

APD Description

A 4-channel APD array for near infrared (NIR) detection of First Sensor is used. It is placed in a ceramic carrier type non-hermetic SMD package with AR-coated glass window. The used APD arrays are engineering samples for LiDAR applications (autonomous driving, industrial, and commercial) with the following technical parameters.

APD to TIA Connection

The APD outputs are connected to the TIA in a DC-coupled fashion. There is no need for AC coupling capacitors in this case although it is left to the discretion of designers to select from the AC or DC coupling based on the application requirements. Both schemes are allowed.

Connectors were added in this design to access the TIA independently. These are AC-coupled (Figure 3).

Alternative Input to Bypass APD

The APD array can be bypassed and each TIA input channel can be fed from an external electrical source generator. Unsolder all the four 0Ω resistors R11, R12, R13, and R14, and populate the following resistors with 0Ω: R3, R7, R8, and R10.

TIA to Comparator Connection

The TIA outputs in this design are sent to the comparator inputs in an AC-coupled mode using the C10 and C11 capacitors. Then, R16, R17, R18, and R19 allow to create the necessary offset between IN+ and IN- for the proper operation of the comparator.

Comparator Output

The MAX40026 provides a low-voltage differential signaling (LVDS) output, which can be sent directly to any processing circuit.

Required Equipment

• MAXREFDES_LIDAR1#
• 3.3V/200mA DV Power Supply
• -50V/200mA DC Power Supply
• 500MHz Digital Oscilloscope with Two Channels
• Two Equal Length SMA Cables
• Light Source (Flashlight)

Procedure

1. Connect the -50V supply to the -HV and GND banana jacks of the MAXREFDES_LIDAR1 board.
2. Connect the 3.3V supply to VCC and GND pads of the MAXREFDES_LIDAR1 board.
3. Verify the shunts are installed on the jumpers according to Table 7.
4. Connect the SMA cables to OUT+ (J6) and OUT- (J7) connectors of the board to the oscilloscope channels.
5. Turn on the power supplies.
6. Apply the light source on U2 of the MAXREFDES_LIDAR1 board (about one inch away).
7. Monitor the oscilloscope. The OUT+ and OUT should toggle like Figure 7.
8. Move the shunt of the jumper SEL0 to the 1 to 2 position. Repeat steps 6 and 7.
9. Move the shunt of the jumper SEL0 to the 2 to 3 position and SEL1 to 1 to 2 position. Repeat steps 6 and 7.
10. Move the shunt of the jumper SEL1 to the 2 to 3 position. Repeat steps 6 and 7.
11. The test is complete.

A 4-layer PCB board is used for this reference design with a high-performance substrate material like Rogers. The top and bottom layers implement all the signals, while layer 2 and 3 are used as ground planes.

The following guidelines are implemented:

• A differential microstrip is used for the MAX40662 outputs with terminations close to the outputs. Avoid unwanted stubs by removing the ground below the traces not part of the termination line leading into the input pins. The parasitic capacitance created between the traces and ground slow down and even distort the signals by creating reflections on the path.

• The input trace connecting each of the photo-diode array to the IN_ of the MAX40662 should be as short as possible and have ground etched/removed underneath. This reduces unwanted parasitic capacitance created in the PCB. Longer trace lengths increases the parasitic inductance in the signal trace paths.

• There are four input traces in the design. It is critical to include a ground isolation between them to minimize channel to channel coupling.

• Mount one or more ceramic capacitors between the GND and VCC as close to the pins as possible. Multiple bypass capacitors reduce the effect of trace impedance and capacitor ESR.

• Bypass capacitors are chosen for minimum inductance and ESR.

• Minimize any parasitic layout inductance by keeping the traces as short as possible.