The CMOS ADSP-3210 Multiplier and ADSP-3220 ALU (Arithmetic & Logic Unit) from a floating-point chip set that contains the basic elements for implementing a high-speed 64-bit numerical processor, capable of performing floating-point arithmetic operations with a hitherto unavailable combination of high speed, low dissipation, and wide dynamic range, while maintaining compatibility with IEEE Standard 754 (draft 10.0) for binary floating-point arithmetic.
With these devices, all singe-precision (SP) 32-bit and double-precision (DP) 64-bit floating-point arithmetic and logic operations—as well as 32-bit twos-complement fixed point—can be performed at 10 megaflops (million floating-point operations per second), with the exception of double-precision floating-point multiplication, which can be performed at 2.5 Mflops. Read full article
