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- VideoMar 11, 20131:01Watch the AD9250 a dual, 14-bit, 250 MSPS, ADC with a JESD204B high speed serial interface connected to a Xilinx KC705 development system run the Analog Devices reference design, which includes the Xilinx LogiCORE™ IP JESD204 core.
- Technical ArticlesOct 1, 2019Unquestionably, a hallmark of the Information Age is an explosion in the need to collect, process, and distribute larger and larger chunks of data.
- InformationalThe JESD204 and the JESD204B revision data converter serial interface standard was created through the JEDEC committee to standardize and reduce the number of data inputs/outputs between high-speed data converters and other devices, such as FPGAs (field-programmable gate arrays).
- Analog DialoguePart 2 of the series looks at the key elements of the JESD204C standard that enable the problem solving technology that is specified. The bandwidth efficiency improvements enable by the 64B/66B encoding scheme is given a closer look as is the bandwidth increasing 32Gbps physical layer specification.
- SoftwareIntegrated JESD204 software framework for rapid system-level development and optimization
- Analog DialogueIn this article, a justification is made for the new version of the JESD204 standard by describing some of the problems it solves. A summary of the differences between the B and C version of the standard is made by describing new terminology and features.
- VideoNov 1, 20112:35The AD9644 is a low-power, high-speed 14-bit ADCs with JESD204A data converter serial interface allow designers to extend transmission lengths while improving signal integrity and simplifying printed-circuit board layout.
- Technical ArticlesOct 1, 2019In “JESD204B Subclasses (Part 1): An Introduction to JESD204B Subclasses and Deterministic Latency,” a summary of the JESD204B subclasses and deterministic latency was given along with details regarding an application layer solution for multichip synchronization in a subclass 0 system.
- Technical ArticlesAug 1, 2019The JESD204A/JESD204B industry standard for serial interfaces was developed to address the problem of interconnecting the newest wideband data converters with other system ICs in an efficient and cost saving manner.
- User GuideThe JESD204, JESD204A and the JESD204B data converter serial interface standard was created through the JEDEC committee to standardize and reduce the number of data inputs/outputs between high-speed data converters and other devices, such as FPGAs (field-programmable gate arrays).
