CN0155

With ac excitation, the polarity of the excitation voltage to the load cell is switched using external MOSFETs. Consecutive values are then averaged, which removes dc induced offsets. The AD7195 contains the internal logic to control the switching of the external MOSFETs. The driver signals from the AD7195 are precisely timed and nonoverlapping, which ensures that no short circuit occurs when switching the polarity of the bridge drive voltage. Pull-up and pull-down 1 MΩ resistors are connected to ACX2 and ACX2 to prevent short-circuiting during power-up.

The AD7195 provides an integrated solution for ac excited load cells. The AD7195 can accept an inverted reference voltage, which is required when the excitation voltage to the load cell is inverted. The AD7195 synchronizes the ac excitation with the conversions and performs the averaging. Only a few external components are required. Along with the MOSFET transistors, the only other external components required are some filters on the analog inputs and capacitors on the reference pins for EMC purposes.

The low level signal from the load cell is amplified by the AD7195 internal PGA. The PGA is programmed to operate with a gain of 128. The conversions from the AD7195 are then sent to the PC via the USB connector. Using LabView™ software, the conversions are converted to weight and displayed.

Figure 2 shows the actual test setup. A 6-wire load cell is used because this gives the optimum system performance. A 6-wire load cell has two sense pins in addition to the excitation, ground, and two output connections. The sense pins are connected to the high side and low side of the Wheatstone bridge. The voltage developed across the bridge can, therefore, be accurately measured regardless of the voltage drop due to the wiring resistance. In addition, the AD7195 has differential analog inputs, and it accepts a differential reference. Connection of the load cell differential SENSE lines to the AD7195 reference inputs creates a ratiometric configuration that is immune to low frequency changes in the power supply excitation voltage. In addition, it eliminates the need for a precision reference. With a 4-wire load cell, the sense pins are not present, and the ADC reference pins are connected to the excitation pins EXC+ and EXC−.

With this arrangement, the system is not completely ratiometric because there is a voltage drop between the EXC+/EXC− pins and the SENSE+/SENSE− due to wiring resistance.

The AD7195 has separate analog and digital power supply pins. The analog section must be powered from 5 V. The digital power supply is independent of the analog power supply and can be any voltage between 2.7 V and 5.25 V.

The microcontroller uses a 3.3 V power supply. Therefore, DVDD is also powered from 3.3 V. This simplifies the interface between the ADC and microcontroller because no external level shifting is required.

There are several methods to power the weigh scale system. It can be powered from the main power supply bus or battery powered (as shown in Figure 1). A 5 V low noise regulator is used to ensure that the AD7195 and the load cell receive a low noise supply. The ADP3303 (5 V) is used to generate the 5 V supply and is a low noise regulator. The filter network shown inside the dotted box ensures a low noise AVDD for the system. In addition, noise reduction capacitors are placed on the regulator output as recommended in the ADP3303 (5 V) data sheet. To optimize the EMC performance, the regulator output is filtered ahead of the AD7195 and the load cell. The 3.3 V digital supply is generated using the ADP3303 (3.3 V). It is essential that low noise regulators be used to generate all the power supply voltages to the AD7195 and the load cell because any noise on the power supply or ground planes introduces noise into the system and degrades the circuit performance.

If a 2 kg load cell with a sensitivity of 2 mV/V is used, the full-scale signal from the load cell is 10 mV when the excitation voltage is 5 V. A load cell has an offset, or TARE, associated with it. The noise of the system is calculated by the software to be 10 nV rms and 51 nV peak-to-peak. This equates to 196,000 noise-free counts, or 17.5 bits of noise-free code resolution (calculated from the measured peak-to-peak noise). The TARE can have a magnitude that is up to 50% of the load cell full-scale output signal. The load cell also has a gain error that can be up to ±20% of full scale. Some customers use a DAC to remove or null the TARE. When the AD7195 uses a 5 V reference, its analog input range is equal to ±40 mV when the gain is set to 128 and the part is configured for bipolar operation. The wide analog input range of the AD7195 relative to the load cell full-scale signal (10 mV) is beneficial because it ensures that the offset and gain error of the load cell do not overload the ADC’s front end.

The AD7195 has an rms noise of 6 nV and a peak-to-peak noise of 40 nV when the first filter notch is programmed to 4.7 Hz. This corresponds to an output data rate of 1.17 Hz when ac excitation is used (sinc⁴ filter selected). The number of noise-free counts is equal to

In practice, the load cell itself introduces some noise. Figure 3 shows the measured output performance when a 1 kg weight is placed on the load cell and 500 conversions are gathered. 

Figure 4 shows the performance in terms of weight. The peak-to-peak variation in output is 0.01 grams over the 500 codes. Therefore, the weigh scale system achieves an accuracy of 0.01 grams.

The plots show the actual (raw) conversions read back from the AD7195 when the load cell is attached. In practice, a digital post filter is used in a weigh scale system. The additional averaging that is performed in the post filter further improves the number of noise-free counts at the expense of a reduced output data rate.

As with any high accuracy circuit, proper layout, grounding, and decoupling techniques must be employed. See Tutorial MT-031, Grounding Data Converters and Solving the Mystery of AGND and DGND and Tutorial MT-101, Decoupling Techniques for more details.

A complete design support package for this circuit note can be found at http://www.analog.com/CN0155-DesignSupport.