ADSP-21368
製造中止High-Performance 32-bit Floating-Point SHARC Processor for Professional Audio Applications
製品の詳細
- 400MHz SIMD SHARC Core, capable of 2.4 GFLOPS peak performance
- 2Mbits SRAM; 6 Mbits customer-definable ROM
- High bandwidth, 32-bit external memory interface supporting glue-less interface to SDRAM, SRAM, and FLASH
- Digital Audio Interface (DAI) enabling user-definable access to system peripherals including 8 serial ports (SPORTs), S/PDIF Tx/Rx, 8-channel asynchronous sample rate converter, and 4 precision clock generators.
- Hardware support for shared external memory
- Digital Peripheral Interface (DPI) enabling user-definable access to system peripherals including 2 SPI-compatible ports, 2 UARTs, 3 full-featured timers, and a two-wire interface compliant to the I2C standard.
- 34 zero-overhead DMA channels
- 16 Pulse Width Modulation (PWM) channels
- 256-ball SBGA package
- Commercial and industrial temperature ranges
The third generation of SHARC® Processors offers increased performance, audio and application-focused peripherals, and new memory configurations. The ADSP-21368 increases performance to 400MHz while simplifying algorithm development with the integration of a high-bandwidth and very flexible external memory interface. The ADSP-21368 is based on a single-instruction, multiple-data (SIMD) core which supports both 32-bit fixed-point and 32-/40-bit floating point arithmetic formats and is completely code-compatible with all prior SHARC Processors allowing for maximum reuse of legacy code.
The ADSP-21368 increases the amount of on-chip memory to 2Mb SRAM and 6Mb ROM while integrating a variety of audio-specific and general purpose peripherals. Peripherals such as an all digital S/PDIF transmitter/receiver, 8-channel asynchronous sample rate converter, 8 high-speed serial ports, 4 precision clock generators, and multiple serial interfaces combine to ensure the ADSP-21368 maximizes system throughput while minimizing system bill of materials costs.
The ADSP-21368 also provides hardware support for connection multiple processors to a single, shared external memory array. The support includes:
- Distributed, on-chip arbitration for the shared external bus
- Fixed and rotating priority bus arbitration
- Bus timeout logic
- Bus lock
ドキュメント
ユーザ・ガイド 4
アプリケーション・ノート 44
プロセッサ・マニュアル 4
製品ハイライト 1
ソフトウェア・マニュアル 11
エミュレータ・マニュアル 3
集積回路異常 1
製造中止品のデータシート 1
これは最新改訂バージョンのデータシートです。
ソフトウェア・リソース
ADSP-2136x Application Code Examples - Single Channel 13
- Single-Channel Block FIR
- Single-Channel Complex Block FIR
- Single-Channel Complex Vector Add
- Single-Channel Complex Vector DOT Product
- Single-Channel Complex Vector Multiply Accumulate
- Single-Channel Complex Vector Multiply
- Single-Channel Complex Vector RAD2 FFT
- Single-Channel Complex Vector RAD4 FFT
- Single-Channel Matrix by Matrix
- Single-Channel Matrix by Vector
- Single-Channel Real Rad2 FFT
- Single-Channel Single Sample FIR
- Single-Channel Vector Maximum
ADSP-2136x Application Code Examples - Multi Channel 8
ソフトウェアおよびツール異常 1
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