ADSP-21262
PRODUCTION3rd Generation Low Cost 32-Bit Floating-Point SHARC DSP
- Part Models
- 3
- 1ku List Price
- price unavailable
Part Details
- 200MHz (5ns) SIMD SHARC Core, capable of 1.2GFLOPS
- Code compatible with all SHARC DSPs
- Supports IEEE-compatible 32-bit floating-point, 40-bit floating-point and 32-bit fixed-point data types
- 2Mbit on-chip dual-ported SRAM; 4Mbit mask-programmable ROM
- 2.4Gbyte/sec on-chip bandwidth
- 6 independent Serial Ports - Supports: Standard DSP Serial mode, I2S mode, Left Justified Sample pair mode and TDM mode
- 22 Zero-overhead DMA channels
- SPI compatible interface and a 16-bit Parallel Port
- Digital Applications Interface (DAI)
- PLL capable of a variety of software multiplier ratios
- Four timers: 1 core and 3 general purpose timers supporting PWM generation mode, PWM capture/pulse width measurement mode and external event watchdog mode
- 136-ball BGA (12mm × 12mm) and 144-lead LQFP (20mm × 20mm) packages available in Commercial and Industrial temp ranges
The ADSP-21262 is the first member of the third-generation of SHARC® programmable DSPs. A range of applications such as high-quality audio and automotive entertainment systems, voice recognition, medical appliances and measurement devices benefit from the ADSP-21262’s integration of large on-chip memory with a wide variety of peripherals—thereby speeding time to market and keeping costs low.
The ADSP-21262 is based on the SHARC DSP core that supports execution of 32-bit fixed-point and 32/40-bit floating-point arithmetic formats. With its core running at 200MHz (5 ns instruction cycle time), the ADSP-21262 is capable of executing complex Fast Fourier Transform (FFT) operations—1024-point complex FFT in 46us, more than 2.6x faster than comparatively priced processors. In audio applications, the single-instruction, multiple data (SIMD) mode effectively doubles the processor performance.
The ADSP-21262 is designed with the highest level of integration, including 2 Mbit of on-chip dual-ported SRAM and 4 Mbit of mask programmable ROM memory. This large on-chip dual-ported memory enables sustained processor and I/O performance, without the need for external memory. System I/O is achieved through six full-duplex serial ports, four timers, a 16-bit parallel port, a serial peripheral interface (SPI), 22 zero-overhead Direct Memory Access (DMA) channels delivering fast data transfers without processor intervention and an innovative Digital Applications Interface (DAI) offering complete software control through its Signal Routing Unit (SRU).
Digital Applications Interface (DAI) for Simplified I/O System Development
The ADSP-21262 introduces the Digital Applications Interface (DAI), an architecture that enables complete software programmability of various peripherals. The flexibility and ease-of-use of the SHARC programming model, combined with the DAI, allow manufacturers to deploy one hardware configuration into multiple product offerings with different I/O requirements.
Connections are made using the flexible Signal Routing Unit (SRU), a matrix routing group of pins that provides configurable and flexible connectivity between all DAI components and the SRU. The peripherals connected through the DAI are: a precision clock generator (PCG), an input data port (IDP), six SPORTS (serial ports), six flag inputs, six flag outputs, three timers and the SRU. The IDP provides an additional input path to the DSP core, configurable as 8 channels of receive serial data or as 7 channels of receive serial data and a single channel of up to a 20-bit wide parallel data. This level of integration enables the designer to take full advantage of a wide variety of peripherals without sacrificing the overall system performance.
CROSSCORE Development Tools
3rd Generation SHARC DSP members are supported by ADI’s CROSSCORE brand of award winning development tools. The CROSSCORE components include the VisualDSP++™ software development environment, EZ-KIT Lite™ evaluation systems, and emulators.
VisualDSP++ is an integrated software development environment, allowing for fast and easy development, debug, and deployment. The EZ-KIT Lite evaluation system provides an easy way to investigate the power of the ADI family of DSPs and begin to develop applications. Emulators are available for PCI and USB host platforms for rapid on-chip debugging. Additional development tools and algorithms are available from an extensive third-party development community.
Documentation
Data Sheet 1
User Guide 5
Application Note 43
Processor Manual 3
Product Highlight 2
Software Manual 11
Emulator Manual 3
Integrated Circuit Anomaly 1
Legacy Emulator Manual 2
Legacy Evaluation Kit Manual 3
Product Highlight 2
Product Selection Guide 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADSP-21262SBBCZ150 | 136-Ball CSPBGA (12mm x 12mm) | ||
| ADSP-21262SKBCZ200 | 136-Ball CSPBGA (12mm x 12mm) | ||
| ADSP-21262SKSTZ200 | 144-Lead LQFP (20mm x 20mm) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Jun 18, 2010 - 07_0093 Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts |
||
| ADSP-21262SBBCZ150 | PRODUCTION | |
| ADSP-21262SKBCZ200 | PRODUCTION | |
| ADSP-21262SKSTZ200 | PRODUCTION | |
|
Oct 18, 2016 - 16_0034 Assembly Relocation of Select LQFP,LQFP_EP,MQFP,TQFP,TQFP_EP Products to Stats ChipPAC China Jiangyin |
||
| ADSP-21262SKSTZ200 | PRODUCTION | |
|
Jan 5, 2009 - 07_0077 Certification of STATSChipPAC Shanghai, China and AMKOR Philippines as additional sources for Assembly & Test of QFP Packages |
||
| ADSP-21262SKSTZ200 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Software Resources
Software & Tools Anomaly 1
SigmaStudio®
Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.
View DetailsEvaluation Software 0
Tools & Simulations
Evaluation Kits
SHARC EZ-Extender for Analog Devices ADSP-21262 EZ-KIT Lite
Resources
The ADSP-21262 EZ-Kit Lite evaluation hardware provides a low-cost hardware solution for evaluating the ADSP-2126x SHARC processor family.
Resources
The SHARC USB extender board is a low-cost, plug-on extender for EZ-Boards. This extender extends the capabilities of the SHARC evaluation system by connecting the Parallel Port on the ADSP-21262 and ADSP-21364 EZ-Kit Lite and to the Asynchronous Memory Bus on the ADSP-21369 EZ-KIT Lite. For information about compatible EZ-Board products, see the processors family's Software and Tools page.
The USB extender board is a low-cost, plug-on extender for EZ-Boards. This extender extends the capabilities of the evaluation system by providing a connection between the asynchronous memory bus of the Blackfin or SHARC processor and a USB 2.0 device. For information about compatible EZ-Board products, see the processors family's Software and Tools page.
Resources
The SHARC Audio extender board is a low-cost, plug-on extender for EZ-Boards. This extender extends the capabilities of the SHARC evaluation system by providing three AD1939 audio codecs and providing 24 channels of analog audio out, 12 channels of analog audio in. For information about compatible EZ-Board products, see the processors family's Software and Tools page.