ADP2384

• TX
  • 16-bit 12GSPS RFDAC
  • JESD204B Interface
    • 8 lanes up to 12.5Gbps
  • 1x/2x/4x/6x/8x/12x/16x/24x/32x Interpolation
  • 64-bit NCO at max rate
  • Analog Modes of Operation:
    • Normal Mode: 6GSPS DAC rate
      • Synthesis up to 2.5GHz (1st Nyquist)
    • Mix Mode: 6GSPS DAC rate
      • Synthesis in 2nd & 3rd Nyquist zones
    • 2X Normal Mode: 12GSPS DAC rate
      • Synthesis up to 6GHz (1st Nyquist)
    • Excellent dynamic performance
• RX
  • 3.2GHz full power bandwidth at 2.5GSPS
    • Noise Density = -149.5dBFs/Hz, ENOB = 9.5 bits
    • SFDR = 77 dBc at 1GHz Ain (2.5Gsps)
    • SFDR = 77dBc at 1.8GHz Ain (2.5Gsps)
  • +/-0.3 LSB DNL, +/-1.0 LSB INL
  • Dual supplies : 1.3V and 2.5V
  • 8 or 6 Lane JESD204B Outputs
  • Programmable clipping threshold for Fast Detect output
  • Two Integrated wide band digital down converters (DDC) per channel
    • 10-bit complex NCO
    • 2 cascaded half band filters (dec/8, dec/16)
  • Timestamp for synchronous processing alignment
    • SYSREF Setup/Hold detector
  • Programmable Interrupt (IRQ) event monitor

The AD-FMComms11-EBZ board is a system platform board for communication infrastructure applications that demonstrates the Direct to RF (DRF) transmitter and observation receiver architecture. Using high sample rate RFDAC(s) and RFADC(s), a number of components in previous generation transmitters can be eliminated, such as mixers, modulators, IF amplifiers and filters. The objective being to bring the ADC or DAC as close to the antenna as possible, leading to possibly more cost effective and efficient communications solution.

It is composed of multi-GSPS RF ADC and DAC, AD9625 and AD9162 respectively. The transmit path contains a balun, low pass filter, gain block and variable attenuation to produce an output appropriate for a power amplifier module. Along the observation path, the PA output is coupled back into the board through a variable attenuator, a balun and finally the ADC. Clock management is taken care of on board; all the necessary clocks are generated from a reference. Power management is present as well.

The AD-PZSDR2400TDD-EB is a 2.4GHz TDD analog module designed to work with the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. The AD-PZSDR2400TDD-EB is affectionately dubbed the first 'RF personality card'. It plugs into the ADRV1CRR-FMC carrier card. 35mm U.FL coaxial cables connect the card to the ADRV9361-Z7035 SDR SOM providing access to the transmit and receive inputs of the AD9361. Information on the card, how to use it, the design package that surrounds it, and the software which can make it work, can be found on the wiki page.

The purpose of the AD-PZSDR2400TDD-EB is to provide the user with a path to condition the transmit or receive signals of the AD9361. Selection of TX or RX path is achieved by the 200MHz to 2.7GHz SPDT switch HMC546 controlled by the FPGA and accompanying software. The transmit path consists of a 2.4GHz filter, half watt driver amplifier ADL5324 and 2 watt power amplifier HMC921. The receive path consists of the same 2.4GHz filter as well as a low loss LNA HMC669.

• Provides two channels of ADC and two channels of DAC with full synchronization capabilities
• FMC-compatible form factor
• Powered from single FMC connector

The AD-FMCDAQ3-EBZ module is comprised of the AD9680 dual, 14-bit, 1.25 GSPS, JESD204B ADC, the AD9152 dual, 16-bit, 2.5 GSPS, JESD204B DAC, the AD9528 clock, and power management components. It is clocked by an internally generated carrier platform via the FMC connector, comprising a completely self-contained data acquisition and signal synthesis prototyping platform. In an FMC footprint (84 mm × 69 mm), the module’s combination of wideband data conversion, clocking, and power closely approximates real-world hardware and software for system prototyping and design, with no compromise in signal chain performance.

Applications

• Electronic test and measurement equipment
• General-purpose software radios
• Radar systems
• Ultra-wideband satellite receivers
• Signals intelligence (SIGINT)
• Point to point communication systems
• DOCSIS 3.0 CMTS and HFC networks
• Multiple input/multiple output (MIMO) radios
• Automated test equipment

The ADP2384/ADP2386 evaluation board is a complete, 4 A/6 A, 20 V, step-down regulator solution that allows users to evaluate the performance of the ADP2384/ADP2386 with a near ideal printed circuit board (PCB) layout.

The switching frequency can be programmed between 200 kHz and 1.4 MHz, or it can be synchronized to an external clock with a 180° phase shift, which provides the possibility for a stackable multiphase power solution.

The output of the ADP2384/ADP2386 evaluation board is preset to 3.3 V and the switching frequency is set to 600 kHz. Different output voltage settings can be achieved by changing appropriate passive components. The ambient temperature operating range is −40°C to +85°C.

Full details on the ADP2384 and ADP2386 regulators are provided in the ADP2384 and ADP2386 data sheets, available from Analog Devices, Inc., which should be consulted in conjunction with this user guide.

• Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
• Ten AC-coupled output SMA connectors, with output termination for HCSL
• Two single ended AC-coupled reference inputs, usable also as a one differential AC-coupled reference input
• One single ended AC-coupled reference input and 1 single ended DC-coupled reference input, configurable to create together a differential AC-coupled reference input
• Pin programmable, power on ready configurability
• Status LEDs
• PC control using a USB connection
• Microsoft Windows-based Evaluation Software with simple graphical user interface

The AD9546 Evaluation Board is a compact, easy-to-use platform for evaluating all features of the AD9546 multiple input, 10-Output, Dual Channel, Numeric Clock Synchronizer. The AD9546 supports existing and emerging International Telecommunications Union (ITU) standards for the delivery of frequency, phase, and time of day over service provider packet networks, including ITU-G.8262, ITU-T G.812, ITU-T G.813, ITU-T G.823, ITU-T G.824, ITU-T G.825, and ITU-T G.8273.2.

The 10 clock outputs of the AD9546 are synchronized to any one of up to four input references. The digital phase-locked loops (DPLLs) reduce timing jitter associated with the external references. The digitally controlled loop and holdover circuitry continuously generate a low jitter output signal, even when all reference inputs fail. The AD9546 system clock is provided by a 52 MHz crystal. Alternatively, an external clock signal may be provided at a SMA connector (relative components must be populated to enable this functionality).

Applications

• 5G timing transport high precision synchronization
• Global positioning system (GPS), PTP (IEEE 1588), and synchronous Ethernet (SyncE) jitter cleanup and synchronization
• Optical transport networks (OTN), synchronous digital hierarchy (SDH), and macro and small cell base stations
• Small base station clocking (baseband and radio)
• Stratum 2, Stratum 3e, and Stratum 3 holdover, jitter cleanup, and phase transient control
• JESD204B support for analog-to-digital converter (ADC) and digital-to-analog converter (DAC) clocking
• Carrier Ethernet

• Four channels of 1.0 GSPS conversion utilizing JESD204B high speed serial interface
• Driver amplifier interface with 21dB voltage gain adjustment
• Optional on-board or external clocking
• Specific design and I/O added for multi-board synchronization

The AD-FMCADC4-EBZ is a high speed 4-channel data acquisition board featuring two AD9680 dual channel ADC at 1000 MSPS and four ADA4961 low distortion, 3.2 GHz, RF DGA driving each converter. The FMC form factor supports the JESD204B high speed serial interface. All clocking and channel synchronization is support on-board using the AD9528 clock generator. This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9680 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/anti-jamming measures.

The board meets most of the FMC specifications in terms of mechanical size, mounting hole locations, and more. Although this board does meet most of the FMC specifications, it’s not meant as a commercial off the shelf (COTS) board. If you want a commercial, ready to integrate product, please refer to one of the many FMC manufacturers and the FMC specification (ANSI/VITA 57.1).

This board is targeted to use the ADI reference designs that work with Xilinx development systems. ADI provides complete source (HDL and software) to re-create those projects (minus the IP provided by the FPGA vendors, which we use), but may not provide enough info to port this to your custom platform.

The design of the board is specifically tailored to synchronizing multiple AD-FMCADC4-EBZ boards together. For more information on synchronization please refer to A Test Method for Synchronizing Multiple GSPS Converters. The reference design includes the device data capture via the JESD204B serial interface and the SPI interface. The samples are written to the external DDR-DRAM. It allows programming the device and monitoring its internal registers via SPI.