ADL5202

Obsolete

Wide Dynamic Range, High Speed, Digitally Controlled VGA

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Part Details

  • Dual independent, digitally controlled VGAs
  • −11.5 dB to +20 dB gain range
  • 0.5 dB ±0.1 dB step size
  • 150 Ω differential input and output
  • 7.5 dB noise figure at maximum gain
  • OIP3 > 47.5 dBm at 200 MHz
  • −3 dB upper frequency bandwidth of 700 MHz
  • Multiple control interface options
  • Parallel 6-bit control interface (with latch)
  • Serial peripheral interface (SPI) (with fast attack)
  • Gain up/down mode
  • Wide input dynamic range
  • Low power mode option
  • Power-down control
  • Single 5 V supply operation
  • 40-lead, 6 mm × 6 mm LFCSP package
ADL5202
Wide Dynamic Range, High Speed, Digitally Controlled VGA
ADL5202-fbl ADL5202 Pin Configuration
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Documentation

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Software Resources


Tools & Simulations

S-Parameter 1

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

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ADIsimPLL™

ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.

Open Tool

Evaluation Kits

EVAL-ADL5202

ADL5202 Evaluation Board

Product Details

ADL5202-EVALZ is a fully populated, 4-layer, FR4-based evaluation board. For normal operation, it require a 5 V power supply capable of delivering 500 mA and a 3.3 V power supply capable of delivering 1 mA. The 5 V supply is connected to the test loops labeled VPOS and GND. This is the bias for the main amplifiers. The open collector outputs are connected to the main bias via the power plane. The 3.3 V supply is connected to the test loops labeled 3.3 V and GND. The RF input is applied to the SMA connectors labeled INA- and INB-. The RF output is available at the SMA connector labeled OUTA- and OUTB-. A fully differential input and output is easily configured by removing R8, R9, R79, R80, installing a zero ohm jumper at R81, R82, R88, R89, removing transformers, T1, T2, T3, T4 and placing jumpers across the transformer pads. The evaluation board can be programmed through the USB port of a PC running Windows XP or Vista with Microsoft .NET Framework 3.5 installed. The required control software can be downloaded from www.analog.com. Manual operation of the gain control functions is possible using the 3 pin headers and supplied jumpers. Power up is controlled using the 3 pin header labeled PWUPA and PWUPB or an external control signal maybe applied using the SMA connectors labeled PWUPA and PWUPB.

EVAL-ADL5202
ADL5202 Evaluation Board

Reference Designs

Single Channel of Quad IF Receiver Front End
CN0242 Circuits from the lab

High Performance, High IF, 75 MHz Bandwidth, 14-Bit, 250 MSPS Receiver Front End with Band-Pass Antialiasing Filter

Features and Benefits

  • 14-bit, 250MSPS Receiver Front End
  • Bandpass antialiasing filter
  • Digitally controlled VGA
CN0242
High Performance, High IF, 75 MHz Bandwidth, 14-Bit, 250 MSPS Receiver Front End with Band-Pass Antialiasing Filter
Single Channel of Quad IF Receiver Front End

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