AD9523

NOT RECOMMENDED FOR NEW DESIGNS

14-Output, Low Jitter Clock generator

Part Models
2
1ku List Price
Starting From $10.67
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Part Details

  • Output frequency: <1 MHz to 1 GHz
  • Start-up frequency accuracy: <±100 ppm (determined by VCXO reference accuracy)
  • Zero delay operation
    Input-to-output edge timing: <±500 ps
  • 14 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS
  • 14 dedicated output dividers with jitterless adjustable delay
  • Adjustable delay: 8 resolution steps of ½ period of VCO output divider
  • Output-to-output skew: <50 ps
  • Duty-cycle correction for odd divider settings
  • Automatic synchronization of all outputs on power-up
  • Nonvolatile EEPROM stores configuration settings
  • Please see data sheet for additional features
AD9523
14-Output, Low Jitter Clock generator
AD9523 Functional Block Diagram AD9523 Pin Configuration
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Software Resources


Hardware Ecosystem

Parts Product Life Cycle Description
AD9528 RECOMMENDED FOR NEW DESIGNS JESD204B/JESD204C Clock Generator with 14 LVDS/HSTL Outputs
AD9523-1 RECOMMENDED FOR NEW DESIGNS Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs
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Tools & Simulations

AD9523/AD9523-1 IBIS Model 1

ADIsimCLK Design and Evaluation Software

ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.

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Evaluation Kits

EVAL-AD9523-1

AD9523/AD9523-1 Evaluation Board

Features and Benefits

  • Simple power connection using USB connection and on-board LDO voltage regulators
  • LDOs are easily bypassed for power measurements
  • AC-coupled differential SMA connectors
  • SMA connectors for
    2 reference inputs
    2 PLL status outputs
    1 reference test input
    2 VCXO interface inputs/outputs
  • Microsoft Windows®–based evaluation software with simple graphical user interface
  • On-board PLL loop filter
  • Easy access to digital I/O and diagnostic signals via I/O header
  • Status LEDs for diagnostic signals
  • USB computer interface
  • Software calculator provides flexibility, allowing programming of almost any rational input/output frequency ratio

Product Details

The AD9523-1 is designed to support the clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise requirements necessary for acceptable data converter SNR performance. The AD9523-1 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9523-1. A 122.88 MHz VCXO is mounted on the evaluation board to provide a complete solution.


The input receivers are configured as differential but the evaluation board has baluns to provide a single-ended input for easy evaluation using common laboratory single-ended signal sources. Output 8 is connected to an ADCLK905 clock buffer to provide a way to evaluate an Analog Devices, Inc., buffer. Although the ADCLK905 is a 1-to-1 buffer, the performance is similar to the larger fanout buffer, for example, the 1-to-2 buffer, ADCLK925. Output 1 and Output 9 are configured with baluns to provide a single-ended output to drive most test equipment. Output 0 is configured for differential zero delay operation.

EVAL-AD9523-1
AD9523/AD9523-1 Evaluation Board

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