AD9252
NOT RECOMMENDED FOR NEW DESIGNSOctal, 14-Bit, 50 MSPS, Serial LVDS, 1.8 V ADC
- Part Models
- 2
- 1ku List Price
- Starting From $72.28
Part Details
- 8 analog-to-digital converters (ADCs) integrated into 1 package
- 93.5 mW ADC power per channel at 50 MSPS
- SNR = 73 dB (to Nyquist)
- SFDR = 84 dBc (to Nyquist)
- Excellent linearity
- DNL = ±0.4 LSB (typical)
- INL = ±1.5 LSB (typical)
- Serial LVDS (ANSI-644, default)
Low power, reduced signal option (similar to IEEE 1596.3) - Data and frame clock outputs
- 325 MHz, full-power analog bandwidth
- 2 V p-p input voltage range
- 1.8 V supply operation
- Please see the data sheet for additional information
The AD9252 is an octal, 14-bit, 50 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. Operating at a conversion rate of up to 50 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock (DCO) for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user- defined test patterns entered via the serial port interface (SPI).
The AD9252 is available in an RoHS compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.
Product Highlights
- Small Footprint. Eight ADCs are contained in a small package.
- Low Power of 93.5 mW per Channel at 50 MSPS.
- Ease of Use. A data clock output (DCO) operates up to 350 MHz and supports double data rate (DDR) operation.
- User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements.
- Pin-Compatible Family. This includes the AD9212 (10-bit) and AD9222 (12-bit).
Applications
- Medical imaging and nondestructive ultrasound
- Portable ultrasound and digital beam-forming systems
- Quadrature radio receivers
- Diversity radio receivers
- Tape drives
- Optical networking
- Test equipment
Documentation
Data Sheet 1
Application Note 12
Technical Articles 1
Evaluation Design File 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9252ABCPZ-50 | 64-Lead LFCSP (9mm x 9mm w/ EP) | ||
| AD9252ABCPZRL7-50 | 64-Lead LFCSP (9mm x 9mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Feb 1, 2024 - 24_0009 Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process |
||
| AD9252ABCPZ-50 | PRODUCTION | |
| AD9252ABCPZRL7-50 | PRODUCTION | |
|
Jun 9, 2021 - 20_0126 Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea |
||
| AD9252ABCPZ-50 | PRODUCTION | |
| AD9252ABCPZRL7-50 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Analog Control Variable Gain Amplifiers (VGAs) 1 | ||
| AD8334 | PRODUCTION | Quad VGA with Ultralow Noise Preamplifier and Programmable RIN |
| Clock Distribution Devices 5 | ||
| AD9513 | RECOMMENDED FOR NEW DESIGNS | 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9514 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9515 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
| ADCLK905 | RECOMMENDED FOR NEW DESIGNS | Ultrafast SiGe ECL Clock/Data Buffers |
| ADCLK846 | RECOMMENDED FOR NEW DESIGNS | 1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer |
| Clock Generation Devices 3 | ||
| AD9510 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
| AD9511 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
| AD9512 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
| Fully Differential Amplifiers 1 | ||
| AD8352 | RECOMMENDED FOR NEW DESIGNS | 2 GHz Ultralow Distortion Differential RF/IF Amplifier |
| Series Voltage References 1 | ||
| ADR130 | PRODUCTION | Precision Series Sub-Band Gap Voltage Reference |
| Single-Ended to Differential Amplifiers 2 | ||
| ADA4938-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
| ADA4939-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolAD9252 IBIS Models 1
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Open ToolAD9252 Simulink ADIsimADC Model
Open ToolEvaluation Kits
FPGA-Based Data Capture Kit
Resources
Software
AD9252 Evaluation Board