AD1890
AD1890
ObsoleteSamplePort Stereo ASRC for 18 and 20 bit applications
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Part Details
The AD1890 and AD1891 SamplePorts are fully digital, stereo Asynchronous Sample Rate Converters (ASRCs) that solve sample rate interfacing and compatibility problems in digital audio equipment. The AD1890 is intended for 18- and 20-bit professional applications, and the AD1891 is intended for 16-bit lower cost applications where large dynamic sample-rate changes are not encountered. These devices are asynchronous because the frequency and phase relationships between the input and output sample clocks (both are inputs to the AD1890/AD1891 ASRCs) are arbitrary and need not be related by a simple integer ratio. There is no need to explicitly select or program the input and output sample clock frequencies, as the AD1890/AD1891 automatically sense the relationship between the two clocks. The input and output sample clock frequencies can nominally range from 8 kHz to 56 kHz, and the ratio between them can vary from 1:2 to 2:1.
The input and output control signals allow for considerable flexibility for interfacing to a variety of DSP chips, AES/EBU receivers and transmitters and for I2S compatible devices. Input and output data can be independently justified to the left/right clock edge, or delayed by one bit clock from the left/right clock edge. Input and output data can also be independently justified to the word clock rising edge or delayed by one bit clock from the word clock rising edge.
The AD1890/AD1891 are fabricated in a 0.8 µm single poly, double metal CMOS process and are packaged in a 0.6" wide 28-pin plastic DIP and a 28-pin PLCC. The AD1890/AD1891 operate from a +5 V power supply over the temperature range of 0°C to +70°C.
For more information on ADI's Audio Portfolio, visit the Audio Solutions home page.
Documentation
Data Sheet 1
Application Note 4
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
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AD1890JNZ | 28-Lead PDIP | ||
AD1890JPZ | 28 ld PLCC | ||
AD1890JPZ-REEL | 28 ld PLCC |
Part Models | Product Lifecycle | PCN |
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Aug 19, 2009 - 07_0024 Package Material Changes for SOT23, MiniSO, MQFP, PDIP, PLCC, SOIC (narrow and wide body), SSOP, TSSOP and TSSOP exposed pad |
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AD1890JNZ | Obsolete | |
Dec 10, 2009 - 09_0064 AD1890JPZ-REEL Obsolete Notification |
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AD1890JPZ-REEL | Obsolete |
This is the most up-to-date revision of the Data Sheet.
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